In 2019, the Institute of Computing Technology (ICT) of the Chinese Academy of Sciences (CAS) began the “XiangShan” project, aiming to create a high-performance open-source RISC-V processor. The result of this endeavor was the XiangShan processor core, which has gained much attention on GitHub, with over 4,500 stars and 630 forks to date.
XiangShan has also received support from various companies, leading to the formation of a group focused on further developing the processor and promoting the RISC-V ecosystem.
The Beijing Institute of Open Source Chip (BOSC), a nonprofit organization, was created to help drive the development of XiangShan, with a focus on regular updates and improvements to the processor’s design, performance, and power efficiency. The goal is to make XiangShan a competitive, open-source processor that can serve a wide range of applications.
The Linux of Processors
XiangShan has now made an appearance at Hot Chips 2024, a symposium on High Performance Chips held at the end of August in Stanford, California, where it caught the attention of ServeTheHome, which noted that it is “a high-performance CPU design, instead of lower performance designs that we have seen from others.”
Described as “The Linux of Processors” in one of the XiangShan slides, the project showcases a two-tier CPU core roadmap highlighting two architectures: Kunminghu, targeting the Arm Neoverse N2 and designed for high performance in servers and data centers, and Nanhu, targeting the Arm Cortex A76, focused on power and area efficiency for industrial control applications. You can see a comparison in this image:
The XiangShan Project plans to advance its microarchitecture through a dual development team approach, focusing on agile development to refine high-performance open source processors, with yearly taped-out test chips for each architecture to meet the needs of both industry and academia.
As STH’s Patrick Kennedy observes, “It is cool to see what is essentially two RISC-V projects out of China directly targeting the performance and product segments of two Arm CPUs. We often see customized RISC-V designs, but these are more general-purpose chips.”
